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G8MNY > TECH 07.08.06 05:45l 71 Lines 3410 Bytes #999 (0) @ WW
BID : U7GN2BQF_00D
Read: DO3MCA DL1LCA GUEST OE7FMI
Subj: Laptop Fluorescent Tube Circuit
Path: DB0FHN<DB0RGB<OK0PPL<DB0RES<ON0BEL<TU5EX<N2BQF
Sent: 060730/1547z @:N2BQF.NY.USA.NA [OpenBCM] OBcm1.06b59
From: G8MNY @ N2BQF.NY.USA.NA (Alan)
To: TECH @ WW
X-Info: Sent with login password
R:060726/0155Z @:N2BQF.NY.USA.NA #:19414 [N2BQF.DYNDNS.ORG] FBB7.01.35 alpha
R:060725/1600Z @:KE4INI.WEB.FL.USA.NOAM #:3511 [3619] FBB7.01b1 $:39707_GB7CIP
R:060725/1558Z @:CX2SA.LAV.URY.SA #:27394 [Minas] FBB7.00e $:39707_GB7CIP
R:060725/1601Z @:GB7YFS.#26.GBR.EU #:56794 [Bourne] $:39707_GB7CIP
R:060725/0909Z @:GB7CIP.#32.GBR.EU #:39707 [Caterham] $:39707_GB7CIP
From: G8MNY@GB7CIP.#32.GBR.EU
To : TECH@WW
By G8MNY (New Jan 06)
(8 Bit ASCII Graphics use code page 437 or 850)
Unlike a simple single ended 12v fluorescent lamp system, that effectively only
puts DC pluses on the tube, that reduces the tube life time by half. This one
uses a much smaller cold cathode tube that needs very high voltage to start.
After reverse engineering the circuit for an old DEL laptop, I was surprised
just how complex it was..
SIMPLIFIED SCHEMATIC
ÚÄÄÄÄÄÄ¿ COLD CATHODE TUBE
³BRIDGE³ /³\ 80V - 1kV /³\
Tube Ú<Ä´& LOADÆÍ<ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ)ÍÍÍÍÍÍ» ³
current³ ÀÄÄÄÄÄÄÙ À((((() ((((()Ù
feedback³ ===== =============
³ 12vÄÄ(((()ÄÂÄ´>ÃÄÄÂÄÄÄÄÄÄ¿ T
+5V ³ ÚÄÄÄÄÄ¿ ÚÄÄÄÄ¿ L ³ ³ (((() ÚÄÄÄÄ¿ ÚÄÄÄÄÄÄ¿ ÚÄÄÄÄ¿
Brill À>Ä´Pulse³ ³Push³ ³ C === ³ ³ ³Push³ ³ ö2 ³ ³RAMP³
Pot<ÄÄÄ>Ä´Width³ ³pull³ ÚÄÁÄ¿ ³ ÚÁÄÄÄÁ¿ ³Pull³ ³LOGIC Ã<´OSC ³
Á ÚÄ>Ä´Comp Ã>´buffÃÄ>´FET³ Á ³FETS Æ<µbuffÆ<µ40% ON³ ³ ³
ÚÄÄÄÄÄÄÁÄ¿ ÀÄÄÄÄÄÙ ÀÄÄÄÄÙ ÀÄÄÄÙ ÀÄÄÄÄÄÙ ÀÄÄÄÄÙ ÀÄÄÄÄÄÄÙ ÀÄÄÄÄÙ
³RAMP OSC³ STEUP UP CONTROL EFFICIENT INVERTER SYSTEM
ÀÄÄÄÄÄÄÄÄÙ
HOW IT WORKS
STEP UP
The left ramp osc is compared with both the brilliance pot & feedback to
produce a variable pulse width drive that feeds a complementary buffer before
driving a power FET (50V 5A). The FET puts extra current into the L choke &
when the FET turns off C is charged to a higher voltage.
INVERTER
The tube inverter also has a ramp osc, & this is level compared to give 40%
on & on & then divided to give 2 outputs of 40% on. These are both buffered
with complementary pairs to drive to higher voltage FETs (250V 2A). These
drive T the push pull step up ferrite transformer. T has a split high voltage
secondary, that connects to the tube, but the centre tap feeds a bridge
rectifier.
FEEDBACK
The bridge feeds a small capacitor & load R. The voltage across this is
proportional to the tube current & is used to control the overall brilliance.
On power up there is no tube current so the step up runs flat out to produce
high voltage for the inverter to run on. With this the inverter produces
something like 1kV balanced AC to the tube. In striking, tube current flows &
the tube voltage drops to about 80V. The step up circuit now controls the
supply voltage to the inverter to maintain the current (brilliance) chosen.
OTHER BITS
Not shown here is the fuse, thermal trip link & the loads of protection diodes
across the FETs etc. Also the whole circuit is all SMD about 2cm x 4cm double
sided components & the diodes are in the same packages as the SMD transistors
making testing horrid! The origan fault was short circuit FETs, non of the SMS
was faulty. :-)
Why don't U send an interesting bul?
73 De John, G8MNY @ GB7CIP
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