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G8MNY  > TECH     27.02.05 17:02l 81 Lines 3242 Bytes #999 (0) @ WW
BID : 34401_GB7CIP
Read: GUEST
Subj: Darlington & Quasi Darlington
Path: DB0FHN<DB0FOR<DB0SIF<DB0EA<DB0NOS<DB0BI<DB0PRA<DB0LJ<DB0RES<ON0AR<
      7M3TJZ<HG8LXL<CX2SA<GB7YFS<GB7WSX<GB7CIP
Sent: 050227/1121Z @:GB7CIP.#32.GBR.EU #:34401 [Caterham] $:34401_GB7CIP
From: G8MNY@GB7CIP.#32.GBR.EU
To  : TECH@WW

By G8MNY                                           (New Dec 04)
This simple way to improve the current gain of a transistor just use 2 in
cascade, often used in PSUs & AF output stages & even the odd RF signal amp.
Two separate devices can be used or in a single package.

NORMAL           Collector
             ÚÄÄÄÄ´    /|\
        T1 ³/     ³     |
Base  ÄÄÄÄÄ´      ³    1V         Current
       /|\ ³\e  ³/   Saturated     Gain HFE  = T1 x T2
        |    ÀÄÄ´ T2    |
    1-1.5V      ³\e     |
        À - - ->  ³    \|/
                 Emitter

This method has the 2 transistors of the same type, & has the disadvantage of
higher bias voltage.

QUASI             ³ Collector!
                ³/e      /|\
       NPN   ÚÄÄ´ T2      |
        T1 ³/   ³\ PNP   1V
Base ÄÄÄÄÄÄ´      ³    Saturated    Gain HFE = T1 x T2
      /|\  ³\e    ³       |
      0.6v   ÀÄÄÄÄ´      \|/
       À - - ->   ³ Emitter

This is often used where T1 is a PNP & T2 is a cheaper high power NPN.

To speed up the 2nd transistor turn off, a low ê is often used base to emitter
in either configuration.

AS PUSH PULL AMP
                              DARLINGTON         3A
  Quasi             ÚÄÄÄÂÄRbsÄÄÄÂÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄo-oÄÄÄÂÄÄÄÄ<+70v
  Complementary     ³  Rc     ³/ T3    ³          Fuse   ³   From Bridge
  Output            ³   ÃÄÄÄÄÄ´ NPN    ³               + ³
                   ===  ³ 6mA ³\e    ³/ T5              ===
                 Cbs³  _³_      ÃÄÄÄÄ´ NPN        Cpower ³
                    ³  \_/ D1   ³ .2A³\e                 ³
                    ³   ³Bias  100     ³                 ³
                    ³   ³       ³      Re  4A Pk         ³       
                ÚÄÄÂÁÄÄÄ)ÄÄÄÄÄÄÄÁÄÄÄÄÄÄÅÄÄÄÄÂÄÄÄÄ¿       ³
              Rnfb ³   _³_ D2          Re   ³u1  ³+      ³
                ³+ ³   \_/      ÚÄÄÄÄÄÄ´   ===  === Cls  ³
               === ³    ³     ³/e T2   ³    ³    ³       ³
            Cnfb³  Rb   ÃÄÄÄÄÄ´ PNP    ³    ³   ÚÁ¿/³LS  ³
 AF             ³  ³  ³/      ³\     ³/ T4  8ê  ÀÂÙ\³8ê  ³
Input >ÄÄRinÄ´ÃÄÁÄÄÁÄÄ´NPN      ÃÄÄÄÄ´ NPN  ³    ³  60w  ³
             Cin   T1 ³\e      100   ³\e    ³    ³       ³
   ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÁÄÄÄÄÁÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄ<0v
                               QUASI    Zobal
  VALUES
Input Z = Rin,  eg. 10K
XCin = Rin @ 10Hz,  eg. 2uF
Gain = (Rnfb//Rb)/Rin, eg. 10x = 150K
XCnfb = Rnfb @ < 10Hz, eg. 1u
T1= 100mA 100v 100x 100mW
T2 & T3 = 1A 100v 30x 5W, eg. TIP29/30
T4 & T5 = 15A 100v 20x 115W on heatsink, eg. 2N3055
D1 & D2 drop the 1.3V needed to just under bias the O/Ps, eg. 1N4148
Re maintain thermal stability, eg 0.22ê 2W
Rb sets 35V on O/P, ((Rc+Rs) x T1Hfe), eg. 330K
Rc sets the peak +ve O/P current (eg « x LS x T5Hfe x T3Hfe) eg. 3K3 1W
Cbs & Rbs are bootstrap to maintain current through Rc. Rbs = Rc/2 eg 1K5 0.5W
XCbs = RS @ < 10Hz  eg. 20uF @ 50v
XCls = LS @ < 10Hz  eg. 1000uF @ 50v
XCpower = LS @ < 20Hz assuming 100Hz supply from bridge, eg 4700uF @ 80v
Zobal network keeps the O/P terminated at HF when the LS is O/C, for stability.

In practice there would be more gain stages in front & more N.F.B. but this
circuit should work OK.


Why don't U send an interesting bul?

73 De John, G8MNY @ GB7CIP


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