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ZL4AJS > QRP 14.06.05 15:29l 36 Lines 1167 Bytes #999 (0) @ WW
BID : 790079ZL4AJS
Read: GUEST DG9NBR
Subj: Help with PA circuit
Path: DB0FHN<DB0FOR<DB0SIF<DB0FHK<DB0LJ<DB0RES<ON0AR<ZL2BAU<ZL2WA<ZL4AA<
ZL4GQ
Sent: 050614/0607Z @:ZL4GQ.#95.NZL.OC #:28012 [Invercargill] FBB7.00i
From: ZL4AJS@ZL4GQ.#95.NZL.OC
To : QRP@WW
Hi All,
I have been trying to design a solid state broadband PA stage for my
latest QRP transceiver, but have hit a 'brick wall' at about 1W! I want it
to have an output of around 5W, but nothing I do will get it above 1W!
I have sent via 7+ the circuit diagram of the PA for interested parties to
look at. It is a black and white BMP zipped up. Pretty suprising how small
it is when zipped, only 1.7 kB! It expands to 17 kB.
On the far left is the input to the driver stages from the osc buffer. The
buffer is the six inverters in a 4049 CMOS ic in series.
The 50 ohm resistor on the far right is the dummy load or antenna.
This design is completely from scratch by me, because I have never seen a
design for a 5W PA. Maybe someone out there can supply one or give me some
advice on what to do.
It only needs to cover 80m and 40m.
Thanks.
73.
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:: Andrew ZL4AJS@ZL4GQ.#95.NZL.OC ::
::: High School student :::
:: Ohai, Southland, NZ ::
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Timed 17:16 on 2005-Jun-14
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